Heterogeneous Reconfigurable Processors for Real-Time by Chenxin Zhang, Liang Liu, Viktor Öwall

By Chenxin Zhang, Liang Liu, Viktor Öwall

This publication makes a speciality of domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform that is versatile sufficient to aid a number of criteria, a number of modes, and a number of algorithms. The content material is multi-disciplinary, protecting parts of instant communique, computing structure, and circuit layout. The platform defined presents real-time processing power with moderate implementation expense, reaching balanced trade-offs between flexibility, functionality, and bills. The authors speak about effective layout equipment for instant verbal exchange processing systems, from either an set of rules and structure layout viewpoint. insurance additionally contains computing structures for various instant applied sciences and criteria, together with MIMO, OFDM, huge MIMO, DVB, WLAN, LTE/LTE-A, and 5G.

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Additional info for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture

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According to [1, 6], homogeneous architectures are not cost effective in supporting algorithms in which the workload cannot be balanced among multiple Processing Elements (PEs), or algorithms involving hybrid data computations like scalar and various length vector processing. In these cases, PEs cannot be fully utilized, resulting in reduced hardware efficiency. Additionally, the approach of integrating data memory inside PE results in difficulties when sharing data contents between surrounding elements.

For example, Channel state Rx Tx Rx Tx Rx Tx Rx a b c Rx Fig. 2 Three operation modes in MIMO, (a) spatial multiplexing, (b) spatial diversity, (c) space division multiple access (multi-user MIMO) 20 3 Digital Baseband Processing information (CSI) between each pair of transmit and receive antennas should be properly estimated and symbol detection is needed to cancel inter-antenna interferences. As a result, efficient hardware implementation of MIMO receivers has become a critical challenge. Moreover, when combining MIMO with OFDM, it is required to perform the corresponding processing at every OFDM subcarrier, posing even more stringent computational and energy requirements.

Regul. Pap. 56(10), 2301–2314 (2009) 22. C. M. Hochwald, Achieving near-capacity at low SNR on a multiple-antenna multipleuser channel. IEEE Trans. Commun. 57(1), 69–74 (2009) Chapter 4 The Reconfigurable Cell Array Emerging as a prominent technology, reconfigurable architectures have the potential of combining high hardware flexibility with high performance data processing. Conventional fine-grained architectures, such as Field-programmable gate arrays (FPGAs), provide great flexibility by allowing bit-level manipulations in system designs.

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Heterogeneous Reconfigurable Processors for Real-Time by Chenxin Zhang, Liang Liu, Viktor Öwall
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